1. Field of Use
The present invention relates to memory systems and more particularly to apparatus and a method for simplifying the construction and cost of such systems.
2. Prior Art
It is well known to construct memory systems utilizing a number of small memory modules. Normally, a small increment of memory is selected for the module size because it has the advantage of losing less memory space in the event of failure. For further discussion of such systems, reference may be made to U.S. Pat. No. 3,803,560 which is assigned to the same assignee as named herein.
In addition to the above, modular memory systems permit ready expansion of the users memory system capacity or memory space when desired. In order to accommodate such expansion, memory system manufacturers have been required to construct a number of different memory systems having different memory capacities or different size increments of memory. This, in turn, has necessitated the construction of a number of different types of memory units.
One prior art system disclosed in U.S. Pat. No. 4,001,790 assigned to the same assignee as named herein employs an arrangement which can utilize the same memory board construction for any one of a number of memory modules connected to a memory controller. In the arrangement, one type of memory board (mother board) includes the control logic circuits and another type memory board (daughter board) contains the memory module. It is required that the memory module board be capable of being plugged into any one of a number of different positions.
In this type of arrangement, it is possible to upgrade and expand the memory system utilizing the two types of memory boards mentioned above. Here, the memory increment or memory size corresponds to the capacity of the daughter board.
The invention disclosed in the copending application of Chester M. Nibby, Jr. and William Panepinto, Jr. simplifies construction of the above type of memory subsystems through the utiliziation of rotating chip selection apparatus. While this type of memory subsystem can be constructed with other types of memory chips having larger capacities, this still requires modifications to be made to the subsystem and results in corresponding increases in memory subsystem capacity.
Accordingly, it is a primary object of the present invention to provide a technique and apparatus for constructing a low cost memory subsystem.
It is a further object of the present invention to provide a memory subsystem low in cost to construct and which can utilize lower cost memory chips.